Patents and Patent Applications
- M. Liu, C. Zhou, K.K. Parhi, and C.H. Kim, "Stable Memory Cell Identification for Hardware Security," US Patent 11,769,548, Issued September 26, 2023
- X. Zhang and K.K. Parhi, "Reduced Complexity Modular Polynomial Multiplication for R-LWE Cryptosystems," US Patent 11,750,366, Issued September 5, 2023
- K.K. Parhi and S.V.S. Avvaru, "Feed-Forward XOR Physical Unclonable Functions," US Patent 11,374,774, Issued June 28, 2022
- M. Liu, C. Zhou, K.K. Parhi, C.H. Kim, "Stable memory cell identification for hardware security," US Patent 11,309,018, Issued April 19, 2022
- K.K. Parhi, and S. Koteshwara, "Dynamic functional Obfuscaion," US Patent 11,061,997, Issued July 13, 2021
- K.K. Parhi, and Z. Zhang, "Method and apparatus for prediction and detection of seizure activity," US Patent 10,426,365, Issued Oct. 1, 2019
- Y. Lao, K.K. Parhi, and C.H. Kim, "Robust device authentication," US Patent 10,235,517, Issued March 19, 2019
- J. Chen and K.K. Parhi, "System for FEXT Cancellation of Multi-Channel Transceivers with Precoding," US Patent 8,699,551, Issued April 15, 2014
- J. Chen and K.K. Parhi, "System for low complexity adaptive ECHO and NEXT cancellers," US Patent 8,600,039, Issued Dec. 3, 2013
- J. Chen and K.K. Parhi "System for MIMO equalization of multi-channel transceivers with precoding," US Patent 8,498,343, Issued July 30, 2013
- O.E. Agazzi, G. Ungerboeck, K.K. Parhi, C.A. Lutkemeyer, P. Vorenkamp, K.T. Chan, and M.H. Wakayama, "System and method for high speed communications using digital signal processing", US Patent 8,422,591, Issued April 16, 2013
- A.E. Cohen and K.K. Parhi "System for secure variable data rate transmission," US Patent 8,416,948, Issued April 9, 2013
- K.K. Parhi and Y. Gu, "System and Method for Low-Power Echo and NEXT Cancellers", US Patent 8,009,823, Issued August 30, 2011
- O.E. Agazzi, G. Ungerboeck, K.K. Parhi, C.A. Lutkemeyer, P. Vorenkamp, K.T. Chan, and M.H. Wakayama, "System and method for high speed communications using digital signal processing", US Patent 7,933,341, Issued April 26, 2011
- K.K. Parhi and Y. Gu, "High-Speed Precoders for Communications Systems", US Patent 7,769,099, Issued August 3, 2010
- S.M. Kim, K.K. Parhi, and R. Liu, "System and Method for Designing RS Based LDPC Code Decoder", US Patent 7,716,553, Issued May 11, 2010
- Y. Gu and K.K. Parhi, "Parallel Tomlinson Harashima Precoders", US Patent 7,693,233, Issued April 6, 2010
- A.E. Cohen and K.K. Parhi, "Low-Complexity Hybrid LDPC Code Encoder", US Patent 7,657,816, Issued Feb. 2, 2010
- K.K. Parhi and Y. Gu , "System and Method for MIMO Equalization for DSP Transceivers", US Patent 7,561,633, Issued July 14, 2009
- K.K. Parhi, "System and method for generating cyclic codes for error control in digital communications", US Patent 7,539,918, Issued May 26, 2009
- K.K. Parhi, J.-G. Chung, K.-C. Lee, K.-J. Cho, "Low-Error Fixed-Width Modified Booth Multiplier," US Patent 7,334,200, Feb. 19, 2008
- K.K. Parhi, "Pipelined Parallel Processing of Feedback Loops in a Digital Circuit", US Patent 7,333,580, Issued Feb. 19, 2008
- K.K. Parhi and J. Kong, "Low-Latency Architectures for High-Throughput Viterbi Decoders", US Patent 7,308,640, Issued December 11, 2007
- K.K. Parhi, "Pipelining of Multiplexor Loops in a Digital Circuit", US Patent 7,239,652, Issued July 3, 2007
- Z. Wang and K.K. Parhi, "Area-Efficient Parallel Turbo Decoding", US Patent 7,200,799, Issued April 3, 2007
- T. Zhang and K.K. Parhi, "LDPC Code and Encoder/Decoder Regarding Same", US Patent 7,120,856, Issued Oct. 10, 2006
- K.K. Parhi, J.-G. Chung and S.-M. Kim, "Low-Error Canonic-Signed-Digit Fixed-Width Multiplier, and Method for Designing Same", US Patent 7,080,115, Issued July 18, 2006
- K.K. Parhi, "Pipelined Add-Compare-Select Circuits and Methods, and Applications there of", US Patent 7,020,831, Issued March 28, 2006
- W. Freking and K.K. Parhi, "Systolic Ring Planarized Cylindrical Array Modular Multiplier", US Patent 7,010,561, Issued March 7, 2006
- K.K. Parhi, J.G. Chung, and K.J. Cho, "Low-Error Fixed-Width Modified Booth Multiplier", US Patent Number 6,978,426, Issued December 20, 2005
- W. Freking and K.K. Parhi, "Systolic Cylindrical Array Modular Multiplier", US Patent Numbber 6,907,440, Issued June 14, 2005
- K.K. Parhi, "System and Method for Generating Cyclic Codes for Error Control in Digital Communications", US Patent Number 6,895,545, Issued May 17, 2005
- W. Freking and K.K. Parhi, "Fast Parallel cascaded Array Modular Multiplier", U.S. Patent Number 6,892,215, Issued May 10, 2005
- R.A. Freking and K.K. Parhi, "Fast and Small Serial Huffman Decoder for Decoding at an Optimally High Rate", U.S. Patent Number 6,307,489, October 23, 2001
- R.A. Freking and K.K. Parhi, "Concurrent Method for Parallel Huffman Compression Coding and Other Variable Length Encoding and Decoding", U.S. Patent Number 6,304,197, October 16, 2001
- R.A. Freking and K.K. Parhi, "Fast and Small Serial Variable Length Encoder with an Optimally High Rate for Encoding Including Huffman Encoding", U.S. Patent Number 6,271,689, August 7, 2001
- M. Ayinala, M.J. Brown, and K.K. Parhi, "Parallel Pipelined Systems for Computing the Fast Fourier Transform," Patent Application 13/136927, Publication 20120041996, Published Feb. 16, 2012
- A.E. Cohen and K.K. Parhi, "System for Congestion Control in Packet Networks," Application 12/802271, Publication 20110299400, Published Dec. 8, 2011
- C. Cheng and K.K. Parhi, "Hardware-Efficient, Low-Latency Architectures for High Throughput Viterbi Decoders," Application 11/951822, Publication 20080109709, Published May 8, 2008
- J.-H. Lin and K.K. Parhi, "Parallelized Binary Arithmetic Coding," Application 11/367041, Publication 20060197689, Published Sept. 7, 2006
- K.K. Parhi and Y. Gu, "Pipelined Parallel Decision Feedback Decoders for High-Speed Communications Systems," Application 11/225825, Publication 20060056503, Published March 16, 2006
- K.K. Parhi and Y. Gu, "Interleaved Trellis Coded Modulation and Decoding," Application 10/897893, Publication 20050018786, Published Jan. 27, 2006